Delamination is separation inside the PCB laminate structure: between base material layers, between copper foil and substrate, or between solder mask and board surface. It appears as localized blistering, white spots or separated areas, and in severe cases as visible bulging of the board.
The danger lies in its progressive nature. Mild delamination can pass outgoing electrical tests, then keep spreading in the field under thermal cycling and moisture. The separation channel becomes a path for CAF (conductive anodic filament) growth and interlayer insulation failure, ending in broken conductors or layer-to-layer shorts.
By the time it is found, the board is usually already in field-failure territory, where rework and liability costs run far higher than an in-line interception.
Managing delamination therefore covers three stages: identifying the cause, preventing it during assembly, and setting acceptance criteria. Each follows below.

Three Causes of Delamination
The cause determines both liability and the prevention method. Keep the three types separate:
The three are distinguished by timing and distribution: batch-wide separation on first heating points to lamination; separation around rework sites points to thermal stress; edge blistering on long-stored boards points to moisture.

Preventing Delamination in Assembly
Prevention addresses the first two causes. All four items are verifiable process controls:
- Moisture sensitivity management for boards and components.
Component exposure time is managed by MSL rating per IPC/JEDEC J-STD-033, while bare PCBs are tracked and stored under IPC-1601 guidelines.
Expired components and boards must be baked before assembly, with a typical bare-board baseline of 105°C to 120°C for 2 to 6 hours, depending on board thickness and surface finish.
Verify bake records and exposure-time tracking; incoming-side control is covered under incoming component inspection.
- Reflow profile control.
Ramp rate, peak temperature and time above liquidus are set to the laminate’s tolerance, with profile data recorded per batch. Lead-free processing runs hotter, which raises the bar for laminate thermal-property matching.
- Rework count limits.
Heating cycles at the same location carry an upper limit and are recorded. Boards over the limit go through scrap or concession disposition.
- Laminate selection matching.
For high layer counts, heavy copper or lead-free processing, selection criteria go beyond Tg (glass transition temperature) to include Td (decomposition temperature) and T260/T288 (time to delamination).
The three together define the laminate’s resistance to delamination inside the process window, confirmed at the DFM stage.
Laminate requirements for wide-temperature operation are covered in extreme temperature reliability.
As an execution reference: Venture Electronics tracks exposure time and bake records for both components and boards, archives reflow profiles per part number, and logs rework operations into batch records.

Detection and Acceptance Criteria
Detection methods are layered by accessibility:
- Visual inspection: blistering, white spots and surface bulging under direct and magnified examination. Distinguish delamination from measling and crazing, which are localized separations at glass-fiber crossings judged under different criteria.
- Cross-sectioning: destructive, used for dispute resolution and failure analysis. It shows the position and extent of separation directly.
- Acoustic scanning (C-SAM): non-destructive imaging, used for batch sampling and incoming-material disputes, and the industry-standard method for delamination detection. How it combines with thermal cycling and burn-in is covered in the PCB reliability testing guide.
PCB delamination detection methods hierarchy: visual inspection, C-SAM acoustic scanning, micro-sectioning
For acceptance references: post-assembly visual judgment follows the relevant IPC-A-610 clauses, while bare-board delamination and blistering criteria follow IPC-A-600. Cite the two separately in the contract, so assembler and board fabricator are never judged against each other’s standard.

How Buyers Assign Liability
Delamination disputes turn on cause attribution: incoming laminate defects belong to PCB fabrication, while thermal stress and failed moisture management belong to assembly. Attribution runs on records:
- From the board fabricator: lamination parameter records, outgoing inspection reports and the laminate CoC.
- From the assembler: bake and exposure-time records, reflow profile data per batch, rework logs.
- For dispute resolution: cross-section or C-SAM results read against the distribution signatures of the three causes.
The party with incomplete records starts every attribution at a disadvantage, which is the practical reason for auditing a supplier’s record system. The full shipping-document structure is covered in the PCBA quality documentation and traceability guide.

Delamination Control Has to Span Fabricator and Assembler
The three causes sit across two supply stages, which is why no single supplier’s assurance settles the problem: laminate and lamination quality live on the fabrication side, moisture management and thermal stress control live on the assembly side, and when either side falls short, the other side’s complete records only prove the problem is not theirs.
Purchasing documents therefore need to cover both ends: acceptance criteria cited separately from IPC-A-610 (post-assembly) and IPC-A-600 (bare board), process records listed as retrievable documents, and the dispute-resolution method with its cost allocation agreed in advance.
Venture Electronics runs PCB fabrication and PCB assembly within one system, with laminate selection, moisture management and reflow profile records connected across both stages, so delamination prevention and attribution never cross a supplier boundary.
For boards combining high layer counts, heavy copper or lead-free processing, laminate and process-window matching can be confirmed with the engineering team before the design freezes.
FAQ About PCB Delamination
Q1: Can a delaminated board still be used?
Mild separation keeps growing under thermal cycling and humidity, so concession acceptance is not advisable for high-reliability work. It only suits products with low failure cost, in a restricted operating environment.
Q2: Are white spots always delamination?
No. Measling at glass-fiber crossings is a localized condition judged under its own IPC clauses. Mixing the two leads to wrong accept-reject calls.
Q3: Does delamination usually originate at the fabricator or the assembler?
Batch-wide separation on first heating points to lamination; separation around rework sites or after a second reflow points to assembly thermal stress. Distribution patterns plus process records settle the question.
Q4: Why is lead-free processing more prone to delamination?
Higher peak temperatures put more stress on the interlayer bond. The countermeasures are laminate thermal-property matching and profile control; the process itself is not an unmanageable risk.
Q5: How do I assess a supplier’s delamination control before ordering?
Check how three record types are maintained: bake and exposure time, reflow profiles, rework logs. A supplier able to retrieve them by batch has real process control in place.
Q6: Are delamination and solder voids the same problem?
No. Voids sit inside solder joints, delamination sits between laminate layers, and the mechanisms and detection methods differ. Voiding is covered in this solder voiding article.


